#include <csl.h>
#include <csl_cache.h>
#include <csl_irq.h>
#include <csl_hpi.h>

#include <std.h>
#include <tsk.h>  
#include <sem.h>   
#include <gio.h>

#include <csl_dat.h>


#include <fvid.h>
#include <edc.h>
#include <vport.h>
#include <vportcap.h>
#include <vportdis.h>
#include <saa7105.h>
#include <saa7115.h> 

extern VPORTCAP_Params DM642_vCapParams;

#define LINE_SZ   720
#define NUM_LINES 240

VPORTCAP_Params DM642_vCapParams = {
    VPORT_MODE_BT656_8BIT, /* cmode:3  */
    VPORT_FLDOP_FRAME,     /* fldOp:3  */    

    VPORT_SCALING_DISABLE, /* scale:1  */    
    VPORT_RESMPL_DISABLE,  /* resmpl:1 */
    VPORTCAP_BPK_10BIT_ZERO_EXTENDED, /*bpk10Bit:2   */

    VPORTCAP_HRST_SAV,     /*hCtRst:1  */
    VPORTCAP_VRST_EAV_V0,  /*vCtRst:1  */
    VPORTCAP_FLDD_DISABLE, /*fldDect:1 */
    VPORTCAP_EXC_DISABLE,  /*extCtl:1  */   
    VPORTCAP_FINV_ENABLE,  /* fldInv:1 */
    
    0,                     /*fldXStrt1 */
    1,                     /*fldYStrt1 */  
    0,                     /*fldXStrt2 */  
    1, //15,               /*fldYStrt2 */
    
    LINE_SZ-1,             /*fldXStop1 */
    NUM_LINES, //+14,      /*fldYStop1 */
    
    LINE_SZ-1,             /*fldXStop2 */
    NUM_LINES, //+14,      /*fldYStop2 */
    
    (LINE_SZ>>3),          /*thrld     */
    3,                     /*numFrmBufs*/
    128,                     /*alignment */
    VPORT_FLDS_MERGED,     /*mergeFlds */
    NULL,                  /*segId     */            
    EDMA_OPT_PRI_HIGH,     /*edmaPri   */
    8                      /* irqId    */
};




VPORT_PortParams DM642_vCapParamsPort = {
    FALSE,                      /*  enableDualChan;                */ 
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 1 polarity    */
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 2 polarity    */
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 3 polarity    */
    &SAA7115_Fxns,
    INV,
};    

#define p_hpic 			(unsigned int*)0x01880000
#define p_writeData 	(unsigned int*)0x00000000
#define p_wdata 		(unsigned int*)0x00000100
#define p_controlData 	(unsigned int*)0x00000200
#define p_fdata 		(unsigned int*)0x00000300
#define p_Uadata 		(unsigned int*)0x80000320



void main(void)
{
	int  bufp[1024],*p;
	GIO_Handle capChan;
	int status;
	
	CSL_init();
//	HpiInterruptInit();
	p = bufp;
	
	 /* enable 128k L2 cache, and enable caching for EMIF A */
    CACHE_clean(CACHE_L2ALL, 0, 0);
    CACHE_setL2Mode( CACHE_128KCACHE );
 
    /* Enable caching of SDRAM */
    CACHE_enableCaching(CACHE_EMIFA_CE00);
    CACHE_enableCaching(CACHE_EMIFA_CE01);
	

	capChan=GIO_create("VP_CAPTURE",IOM_INPUT,&status,NULL,NULL);
	GIO_submit(capChan,IOM_READ,bufp,NULL,NULL);
	
	HPI_FLASH_write(0x00000400, 0x003D0010, 130);
	
}
